Power devices made of gallium nitride (GaN), are gaining popularity over those made of silicon due to their faster switching capability, which can improve overall system efficiency while also reducing system size and cost. The technical advantages, combined with lower costs as GaN production has increased, have led to its increased use in applications such as renewable energy inverters and industrial power supplies.
Optocouplers are used to provide galvanic isolation between control circuits and high voltages. The ability to reject high common mode noise prevents power semiconductors from being driven incorrectly during high-frequency switching.
Benefits of GaN
Gallium nitride is a Gallium and Nitrogen compound with a wide bandgap (3.4 eV). The region formed at the junction of materials where no electron exists is referred to as the bandgap. GaN has a high breakdown voltage and a low conduction resistance because of its wide bandgap. It has a faster switching speed because of its higher electron velocity and lower parasitic capacitance.
The advantages of GaN over Silicon can be summarized into three major points:
- Smaller-scale system designs
- Reduced system costs
- Improved system efficiency
Smaller and less expensive peripheral components result in smaller and less expensive costs. GaN has the ability to operate in reverse conduction mode, thereby eliminating the need for external freewheeling diodes.
It has the ability to operate at high frequencies, resulting in smaller filters and magnetics such as inductors and transformers. GaN operates at 60°C lower temperatures than Silicon, allowing the heat sink to be smaller.
GaN versus Silicon GaN is better in terms of system efficiency.
Lower switching and conduction loss result in higher efficiency. For low switching loss, GaN has a higher electron velocity and a lower parasitic capacitance. At the same breakdown voltage, it is also smaller in size than Silicon, resulting in lower conduction resistance.
Gate drive requirements and GaN types.
The figure above depicts the various GaN types and the gate drive optocoupler requirements for each. For example, Brand E produces 200V GaN, which is primarily used in low voltage applications such as 12V DC-DC converters. Brand T makes 600V GaN switches, but they are normally closed. To convert it into a normally-off switch that is safer to use, a low voltage Silicon MOS in cascode connection is required. The cascode structure prevents adjusting the gate resistance to control the switching speed. This will complicate the EMI (electromagnetic interference) and switching loss fine-tuning.
Panasonic and GaN Systems created normally-off switches by employing a P-type barrier structure beneath the gate to deplete high mobility electrons during 0V gate bias. Because of the high electron mobility, the VTH of GaN is lower than that of Silicon MOS or IGBT. The input capacitance is also very low, less than 1nF, and it only takes 5nC to turn on.
GaN switches very quickly, so caution should be exercised when designing with a high switching dv/dt. Controlling the high dv/dt noise coupling from the GaN to the gate driver is critical. To prevent false switching of the GaN, the smart gate drivers must have a noise immunity of more than 100kV/µs.
Given that Panasonic and GaN systems are normally off and simple to use, the gate drive requirements are very similar to Silicon MOS. Panasonic GaN has a robust gate, which allows a high gate voltage of 12V for fast gate turning on. To charge the gate, GaN Systems recommends 6V. The gate current required is relatively low, less than 1.5A, due to the gate charge and small gate capacitance required.
One thing to keep in mind about Panasonic GaN is that the gate requires a DC holding current of around 10mA to stay “ON.” The absolute maximum gate voltage of 7V must not be exceeded in GaN systems.
Design of a Gate Drive for GaN Systems GaN
A half bridge evaluation board with a 650V E-HEMT GS66508T (30A/50m) GaN transistor from GaN Systems is shown in the figure below. To directly drive the GaN transistors, the half bridge evaluation board employs two gate drive optocouplers ACPL-P346. The bottom bridge gate bias and driver circuit are illustrated in the schematic. The circuitry for the top bridge is the same.
GaN Systems GaN and ACPL-P346 half-bridge evaluation board.
Isolated DC-DC 5V-10V converters are used to provide +6V and -4V bipolar gate drive bias for more robust gate drive and noise immunity. A 6.2V Zener diode is then used to divide the 10V into +6.2V and -3.8V bias. The gate drive output of the ACPL-P346 is made up of ten gate current limiting resistors (for charging) and ten paralleled with two diodes plus a diode for discharging.
Schematic of ACPL-P346 gate drive circuit for GaN Systems half bridge evaluation board.
Test and Performance of the GaN Half Bridge Evaluation Board
The slew rate, switching power loss, and efficiency tests on the GaN and ACPL-P346 were performed using the half-bridge evaluation board from Panasonic and GaN Systems.
Setup and waveforms for slew rate and switching power loss tests.
To form the boost configuration, also known as low side test, an inductor of about 120 to 160H was connected between VDC+ and VSW. Q2 on the low side of the GaN transistor was in boost mode. VDC+/VDC- were both subjected to a 400V bus voltage. The double pulse test was used to easily evaluate device switching performance at high voltage and current without the need to actually run at high power.
Slew rate tests with Panasonic GaN and ACPL-P346.
Slew rate test of GaN Systems GaN and ACPL-P346
The switching current ISW was defined by the period of the first pulse TON1 applied to Q2. The measurement points were t1 (turn-off) and t2 (turn-on) because they were the hard switching transients for the half bridge circuit when Q2 was under high switching stress.
The slew rate tests were carried out at 400V DC and 30A hard switching.
At t1 (turn-off) and t2 (turn-on), the Q2 turn-on and off slew rates (dv/dt) were measured. When the GaN was hard turned off at 400V, 30A, the highest slew rates of more than 110kV/µs (110V/ns) were measured.
ACPL-P346 has a common mode rejection of 100kV/µs as its minimum CMR. In other words, the ACPL-P346 is capable of isolating high transient dv/dt noise from GaN switching. The scope images show that the GaN fast slew rates had no effect on the smart gate drivers, gate voltages and outputs
The same boost configuration was used for the switching loss test, but this time a current sensor was installed to measure ID. The power loss measurement utilized the same double pulse signals and timing as the slew rate test.
When the GaN was turned on or off at the target current level, the measurements were taken at the monitoring points. VDS and IDS were multiplied using an oscilloscope’s math function. The oscilloscope’s measure function was then used to calculate power loss (the area under the curve).
The red line represents the turn-off power losses, and regardless of inductor load current, both GaN power losses were kept below 15μJ. The blue line depicts the turn on power losses; both GaN exhibit a low loss of around 40μJ at 15A.
Switching Power Loss Measurements
To test the efficiency of GaN in hard switching operation, the half bridge evaluation boards were connected as DC-DC converters. The Panasonic GaN DC-DC was connected in boost mode (200V to 380V), while the GaN Systems DC-DC was connected in buck mode (400V to 200V). Both converters were tested at 100 kHz frequency, room temperature, and efficiency at various power levels.
Efficiency Test Measurements
Both converters showed high conversion efficiency of approximately 99%.